- Freescale

Document Number:
QCVS-4.2-RN
Freescale Semiconductor
QCVS 4.2 Release Notes
Release Notes
Contents
1.
2.
1. Important Notes
This release is intended to provide additional
functionality and address a few critical issues found in
QCVS 4.1.1. Please be aware of a known issue
regarding DDR validation with Registered DIMMs
(see the errata section for the workaround). Please
ensure that CSS.exe and CDDE.exe processes are not
running when you install QCVS 4.2. (see installation
errata section for more details).
2. Revision History
2.1.
Important Notes ........................................................... 1
Revision History ........................................................... 1
2.1. QCVS 4.1.1 ......................................................... 1
2.2.
3.
4.
5.
About this release....................................................... 2
3.1. Version information ........................................... 2
3.2.
Download information ....................................... 2
3.3.
Getting help......................................................... 2
System Requirements ................................................ 3
New in this release ..................................................... 3
5.1. Licensing............................................................. 3
5.2.
6.
7.
QCVS 4.2
QCVS 4.1............................................................. 1
Supported devices ............................................. 3
Documentation ............................................................. 5
Errata .............................................................................. 6
7.1. Known Issues for this Release ........................ 6
7.2.
Known Limitations ............................................. 6
7.3.
Documentation Errata ....................................... 8
8. FAQ .................................................................................. 8
Key New Features:
 New tool in the suite: SerDes Configuration &
Validation
 DDR4 support
 LS2085 support for DDR, PBL and HW DeviceTree,
2.2.
QCVS 4.1.1
Key New Features: None.
2.3.
QCVS 4.1
Key New Features: DDR write and read margin scenarios.
© Freescale Semiconductor, Inc., 2014. All rights reserved.
About this release
3. About this release
3.1.
Version information
The 4.2 release of QorIQ Configuration and Validation suite (QCVS) brings new capabilities listed in
the Revision History section.
This release note provides important information for users of the QorIQ Configuration and Validation
suite. You are encouraged to read this document to become familiar with this release’s supported targets,
new features, errata with workarounds, and other useful information.
3.2.
Download information
If you already have a CodeWarrior (PA, ARM v7, ARM v8) product, this release can be installed via the
Internet (no file download required). Alternatively, you can download the installation packages for
offline installation from the QCVS freescale.com site.
Please read the installation guide for more details.
3.3.
Getting help
If you have questions, issues, or want to provide feedback, please use the Freescale online support web
page. To use this page, follow these steps:
1. In a web browser, go to http://www.freescale.com/TechSupport.
Freescale’s Technical Support web page appears.
2. On this page, click the Create Service Request link.
The New Service Request — Category/Topic page appears.
3. From the Category drop-down menu, select Software Product Support.
4. From the Topic drop-down menu, select CodeWarrior (or other appropriate topic).
5. Click Next.
The New Service Request — SR Details page appears.
6. In this page, enter the requested information.
At a minimum, enter information in each field marked by an *.
7. Click Submit.
If you are already logged in, the Service Request Confirmation page appears. Go to the last step.
If you are not already logged in, the Log-in page appears.
8. If you are a registered member, login with your user name and password.
The Service Request Confirmation page appears. Go to the last step.
9. If you have not yet registered,
a. If you want to become registered member, click Register Now and complete the registration process.
Release Notes
2
Freescale Semiconductor
System Requirements
The Service Request Confirmation page appears.
b. If you do not want to register, supply your contact information in the I do not want to register - Provide
contact information form and click Submit.
The Service Request Confirmation page appears.
10. Click Done.
Your service request is submitted.
4. System Requirements
Hardware





Windows® OS: Intel® Pentium® 4 processor, 2 GHz or faster, Intel® Xeon™, Intel® Core™, AMD
Athlon™ 64, AMD Opteron™, or later
Linux® OS: 1.8 GHz Intel® Pentium® class processor (or better)
At least 2 GB of RAM.
At least 3 GB of free disk space.
Internet connectivity for web downloads and update access.
Operating System
This list reflects the set of operating systems the final build has been verified with.




Ubuntu 14.04 LTS, 64 bit
RedHat Enterprise Linux 5.5, 64 bit
Windows 7 Professional (32-bit)
Windows 7 Professional (64-bit)
5. New in this release
5.1.
Licensing
The following components of QCVS are licensed:
- DDR Validation.
- SerDes validation
Request a license here.
5.2.
Supported devices
The following table lists the QorIQ processors and Freescale boards containing those processors that this
release has been tested with. If your processor revision or board isn't listed, it doesn't mean QCVS won't
work with it. It just means that the product hasn't been tested with it.
Release Notes
Freescale Semiconductor
3
New in this release
SoC
P1010
P1011
P1012
P1013
P1014
P1015
P1016
P1017
P1020
P1021
P1022
P1023
P1024
P1025
P2010
P2020
P2040
P2041
P3041
P4040
P4080
P5010
P5020
P5021
P5040
T1014
T1024
T1020
T1022
T1040
T1042
T2080
T2081
T4160
T4240
B4420
B4460
B4860
Revisions Reference manual revision Chip errata revision
1.0, 2.0.1
1.1
1.1
1.1
1.0, 2.0.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
2.1
2.1
1.0, 1,1, 2.0
1.0, 1,1, 2.0
1.0, 1,1, 2.0
1.0, 2.0, 3.0
1.0, 2.0, 3.0
1.0, 2.0
1.0, 2.0
1.0, 2.0, 2.1
1.0, 2.0, 2.1
1.0
1.0
1.0
1.0
1.0, 1.1
1.0, 1.1
1.0, 1.1
1.0
1.0, 2.0
1.0, 2.0
1.0, 2.0, 2.1,
2.2
2.0, 2.1, 2.2
1.0, 2.0, 2.1,
0
0
0
0
0
B
B
0
0
0
0
0
B
B
1
1
1
1
1
1
1
4
4
1
1
C
C
P
Boards
A
A
D
A2
F
F
C
C
C
C
C
C
D
D
N
N
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
RDB
DS
DS
DS
DS
DS
DS
DS
RDB, DS
RDB, DS
RDB, DS
RDB, DS
RDB-PA
RDB-PA
RDB
RDB
RDB, QDS
RDB, QDS
RDB-PA
RDB-PA
RDB
RDB, QDS
B
H
QDS
G
G
L
L
QDS
QDS
A
A
P
P
L
L
L
R
R
L
L
Release Notes
4
Freescale Semiconductor
Docum entation
G4860
BSC9131
BSC9132
C291
C292
C293
LS1020A
LS1021A
LS1022A
LS2085A
2.2
1.0, 2.0, 2.1,
2.2
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
G
0
G
D
D
D
C
C
C
B
L
QDS
C
C
C
A
RDB
RDB
RDB
RDB
RDB
QDS, Tower, IOT
QDS, Tower, IOT
QDS, Tower, IOT
QDS, RDB
6. Documentation
The following documents are included with the product:










QorIQ Configuration and Validation - Product Brief
QorIQ Configuration and Validation - Installation Guide
QorIQ Configuration and Validation - Getting Started Guide
DDR Configuration - User Guide
DDR Validation - Getting Started Guide
DDR Validation - User Guide
SerDes Configuration and Validation - User Guide
BootROM Configuration – User Guide
PBL Configuration - User Guide
Hardware Device Tree - User Guide
Release Notes
Freescale Semiconductor
5
Errata
7. Errata
7.1 Known Issues for this Release
ID
Headline
QCS668
[DDRv] DDR default configuration does not pass read and write margins scenarios
for B4420 and B4460 devices
Workaround: Fine tune the default configuration from the Component Inspector
QCS689
[DDRv] A B4 DDR component created using wizard auto configuration does not
pass validation
Workaround: Check ECC parameter in DDR wizard page.
QCS722
[DDRc] Creating a LS2085 DDR component using "Add default" option results in
errors in Problems View
Workaround: Go to DDR Component Inspector and change the Data Bus clock
property to at least 800 MHz
[SerDes] BIST and Jitter scope tests fail for some lanes[2/3/4/5/6/7] of SerDes
modules 1 & 3 when run on T4160/T4240 v2.0 RDB.
Workaround : none identified
[SerDes] BIST fails when PRBS9 pattern is used on any device
Workaround: None identified
[DDRv] Clock Centering scenario may rarely fail while running write leveling
margins table.
Workaround: None identified. The issue has been reproduced only sporadically.
[DDRv] Using Auto Configuration doesn't result in a valid DDR controller #1
configuration for P5040 device
Workaround: None identified.
[DDRv] BIST-Write-then-Read-No-TurnAround and DMA tests do not pass on
several devices: P3041/P50xx/T2080
Workaround: Manually adjust the DDR configuration.
[General] QCVS 4.2 does not work out of the box over CodeWarrior for ARM v7
10.0.3 or older
Workaround: Please make sure that CSS.exe and CDDE.exe processes are not
running when you install QCVS 4.2.
QCS738
QCS739
QCS740
QCS742
QCS745
QCS762
7.2 Known Limitations
General
 Connecting to T1 devices with USB TAP probe might not work as this probe isn’t officially
supported for T1 devices.
 When using QCVS in Linux environment, start the product with sudo rights (type
Release Notes
6
Freescale Semiconductor
Errata

PBL

sudo ./eclipse in console).
DDR and SerDes validation scenarios have not been formally tested on the following devices:
T2081, T1042, T1022. Instead, the testing was done indirectly using license plate devices:
T2080, T1040, T1020.
The conversion of PBL components from an older to a newer version of QCVS is not supported.
Importing a workspace created with an older version of QCVS into a newer version of QCVS
may result in errors in PBL components, which cannot be manually fixed.
Workaround:
o Generate code for the PBL components created with the older version of QCVS, using
the QCVS version they were created with
o Import the generated code into a PBL component created with the new version of QCVS
DDR
 DDR Validation is not supported for C29x devices.
 A very low network latency may result in validation failure when using the following probes:
CWTAP, ETAP, GTAP
 There is no read and write margins scenario available for Layerscape devices
 No validation tests run on device cores for Layerscape devices, hence the validation is slower
than for the other QorIQ devices.
 The 3rd DDR controller from LS2085 device is not exposed for configuration or validation in
QCVS.
HW Device Tree
 The verification of a DTS change is not triggered automatically unless the project is either
manually build or the Project->Build Automatically option from the Eclipse menu is checked.
Workaround:
o The DTS verification can be manually started by clicking on Project -> Build Project or
Project -> Build All from Eclipse menu.
SerDes
 The validation has been formally tested only using a relevant subset of the possible combinations
for: pattern, count window size and lane protocol/speed configuration.
 The default SerDes configuration for T2081 is not compatible with the possible RCW settings for
SerDes protocol and speed. A warning is displayed to the user after the project is created.
Workaround:
o Open protocol/speed configuration window and choos one of the possible configurations
or read the configuration from target.
 Hardware
o The HiGig and HiGig2 protocols are not officially marked as functional in
hardware.Check A-005325 chip errata for details
o Insert Error bit functionality is not supported in hardware for T4240 v1.0
o BIST fails sporadically on T4240 v1.0 QDS board when using PSSPR/PRBS7 pattern
due to timing issues.
Release Notes
Freescale Semiconductor
7
FAQ
7.3 Installation Errata

When installing over CodeWarrior for ARM v7 older than 10.0.5 or over CodeWarrior for Power
Architectures 10.x, CCS processes have to be first terminated. Otherwise, the QCVS
installation will silently fail, without displaying a notification to the user. As a consequence, the
installation layout will be corrupted, requiring reinstallation over a clean layout (Eclipse or
CodeWarrior)
Workaround:
o Reinstall QCVS over a clean layout (Eclipse or CodeWarrior)
8. FAQ
Q: I have tried to install QCVS into CodeWarrior for Power Architecture on Linux. I got this (or similar)
error message during the installation:
An error occurred while installing the items session context was: (profile=PlatformProfile,
phase=org.eclipse.equinox.internal.p2.engine.phases.Install, operand=null -->
[R]com.freescale.processorexpert.feature.QCVS_root <QCVS version>,
action=com.freescale.updater.customactions.actions.FreescaleInstall). Target: Path <Path> could not be
created
A: The reason is that you didn't have administrator privileges when you installed QCVS. This particular
error occurs when you install CodeWarrior in some root location, e.g., "/usr/lib". To successfully install
QCVS, follow these steps:
 Run CodeWarrior with administrator (root) permissions (sudo ./cwide)
 Install QCVS
 Restart CodeWarrior but do NOT use File > Restart to do so. Quit CodeWarrior and relaunch it
using your non-root permissions
Q: I have a RCW obtained with an older version of QCS and when I import it back into the tool I get
errors. How can I continue working with that RCW?
A: The errors are probably due to new errata constraints this QCVS version now supports. The errors
can be ignored by clicking on the small triangle in the upper right corner of the Component Inspector
view, and choose the "Ignore Constraints and non-Critical Errors" menu item. However, we strongly
recommend you instead adjust the configuration to address the errors..
Q: I have tried to install QCVS into CodeWarrior for Power Architecture on Windows 7/Windows
8/Windows Vista. The installation process stopped with error messages like this:
An error occurred while installing the items session context was: (profile=PlatformProfile,
phase=org.eclipse.equinox.internal.p2.engine.phases.Install, operand=null -->
[R]com.freescale.processorexpert.feature.QCVS_root,
action=com.freescale.updater.customactions.actions.FreescaleInstall). Target: Path could not be created
A: The reason is that you didn't have administrator privileges when you installed QCVS. This particular
error occurs when you have installed CodeWarrior in some administrator location (like Program Files
folder) on Windows 7 or Windows 8 or Vista. To successfully install QCVS, follow these steps:
Release Notes
8
Freescale Semiconductor
FAQ




Log off from Windows
Log in to Windows as administrator
Install QCVS
Restart CodeWarrior but do NOT use 'File > Restart' to do so. Just quit CodeWarrior and
relaunch it using your non-root permissions
Q: On Linux, I get connection errors when I click 'Read SPD' in the DDR component wizard, or when I
try to run a DDR validation
A: Before executing QCVS, run the \eclipse\Optimization\target-connection\cdde\cddelinux\bin\createlinks_xpcom.sh script. Then make sure to start eclipse with sudo rights (that is
sudo ./eclipse).
Release Notes
Freescale Semiconductor
9
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QCVS-4.2-RN
7 April 2015